QC-LDPC Error Correction

Soft-decision error correction for 3D NAND TLC / QLC

ECC

Overview

TLC and QLC NAND storing three or four bits per cell leaves little signal margin, and hard-decision correction alone cannot hold the error rate late in the drive life. That is what soft-decision LDPC is for.

The IP concatenates an inner QC-LDPC code (lifting factor Z = 256) with an outer BCH code (t=8) and CRC32 to lower the residual failure rate. The decoder is two-tier: a fast hard bit-flip pass first, falling back to soft layered NMS when that fails, which holds average latency down without giving up worst-case correction.

Code rates of 0.897 for TLC and 0.844 / 0.802 for QLC are available.

Quote / licensing enquiry Summary datasheet (KO) ← All IP
Headline specifications — the full specification table follows an NDA
CodeQuasi-cyclic LDPC (lifting factor Z = 256)
ConcatenationInner QC-LDPC + outer BCH (t=8) + CRC32
Code rate0.897 (TLC) · 0.844 / 0.802 (QLC)
Decoder2-tier — hard bit-flip, then soft layered NMS

Architecture

Architecture

QC-LDPC concatenated error-correction block diagram — the write path (data, CRC32 and outer BCH, QC-LDPC encoder, 3D NAND) and the read path (two-tier inner LDPC decoder, outer BCH, CRC32 check).

Deliverables

Included with a licence

  • Synthesisable Verilog RTL and integration wrappers
  • Cycle-accurate reference model and equivalence checker
  • Full-chain testbench (clean / correct / UE / pad vectors)
  • Datasheet, manual and integration guide (released under NDA)

Verification toolchains: Intel/Altera (Quartus) · AMD/Xilinx (Vivado) · ASIC — process-portable RTL

Engagement

How we engage

01

IP licence

Licence the verified IP as it stands. Synthesisable RTL, the verification environment and an integration guide come with it.

02

Custom development

The IP is modified or extended to your requirement. Because we design from the interface layer up, unusual requirements can be accommodated.

03

Co-development & national programmes

Joint silicon and firmware development against platform requirements, including participation in national R&D programmes. Scope and terms are agreed case by case.

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