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SSD Technology
  ¤ý Solid-State Drive (SSD) is a non-mechanic semiconductor storage compatible with HDD.
  ¤ý NAND Flash SSD has a controller emulating HDD, through flash memory array.

¡á Physical feature of Flash Memory
  ¤ý Just like ROM(read only memory), when power off, the DATA of memory is not erased.
  ¤ý Just like DRAM/SRAM, read/write is faster than HDD.
  ¤ý It is rugged, shock-resistent and operating temerature scope is more wide than HDD
¡á Technical feature of Flash Memory
  ¤ý Must erase before write.
  ¤ý The unit of read/write and erase is different each other- Read/Write per page (2 to 8KB), Erase per block (128 pages)
  ¤ý Time to read, write, erase is also different.- Read (0.025ms) < write (0.2ms) < erase (1.5ms)
  ¤ý To erase is executed separately by internal request
  ¤ý The flash memory life cycle is limited because erasing wears out the memory.
¡áNOR vs. NAND Structure
£ª NOR Flash
  ¤ý Random, direct access
  ¤ý Random reading speed is fast
  ¤ý Write and erase is slow
  ¤ý Perfect for storing program code
£ª NAND Flash
  ¤ý I/O Access by Page unit
  ¤ý Low price, High Density
  ¤ý Erase and write is better than NOR
  ¤ý Perfect for storing sequential data
¡á SLC vs. MLC
  ¤ý SLC has 1 bit per memory cell, MLC NAND Flash chip has 2 bit per memory cell.

  ¤ý SLC has more reliability than MLC, so it is possible to read/write 100k times, but expensive.
  ¤ý MLC can read/write only several thousand times, But it is good for mass product due to its low price.
  ¤ý SLC is usually used by industrial and defense application.
¡á The Physical Structure of NAND Flash
  ¤ý Reading is very fast but writing is slow, so buffer utilization is used by SSD controller for efficiency
  ¤ý It takes a long time to erase, the controller does the background erase at once in order not to affect the overall performance.

¡á The Logical Structure of NAND Flash Memory
  ¤ý NAND Flash can be accessed only by the Block unit and its sub-structure Page unit, if you use only one byte, you have to use entire page

¡á SSD Architecture
SSD Controller is a kind of SoC (system on chip) to Host (computer),
So can control the flash memory independently to provide a stable storage performance.

¡á FTL(Flash Translation Layer)
  ¤ý Hide operating charateristics
  ¤ý Provide general file system interface
  ¤ý Embedded SW to emulate flash memory to HDD

FTL converts the logical address to the actual physical address of Flash memory, as well as convert the reverse,
to hide its charateristics is a key role because flash memory writing operation is to be delayed.
¡á NAND Flash SSD Architecture

The various technical elements of SSD are required to extend the life span of the Flash memory.

  ¤ý Garbage Collection has similar function just like Windows disk defragmentation on a PC.
  ¤ý ECC is stored to a separate area, when error occured, it can do automatic recovery to take advantage of the stored code.
  ¤ý Bad block management performs a similar role in the background, just as a HDD low level format confirms available storage area
  ¤ý When you continue to write in a certain area of Flash memory by repeating it,
  ¤ý the specific area of the momory cell is damaged,
  ¤ý so Wear leveling helps to write evenly the entire flash memory cell automatically.

 Core Technology
 ¤ý PaxBooT¢â
 ¤ý PaxClean¢â
 ¤ý Defense Technology
 ¤ý SSD Technology
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